1. Field of the Invention
The present invention generally relates to semiconductor devices with electrical interconnect leads and manufacturing methods of the same. More particularly, the invention relates to electrical wiring leads with a lead pattern comprised of an aluminum (Al) wiring layer and interlevel via holes as filled with certain materials less in self-diffusion coefficient than Al, such as tungsten (W) or else.
2. Related Art
In recent years, as semiconductor integrated circuit (IC) products increase in functionalities and operation speeds required, microfabrication and multilayer lamination architectures are becoming more important in the manufacture of semiconductor IC devices. To fabricate highly integrated semiconductor IC chips with a minimum feature size of 0.5 micrometers (μm) or less, multilevel interconnect lead wires made of aluminum (Al) alloys are typically employed while tungsten (W) is used as wire material as hole portions.
Highly integrated IC chips with use of such electrical wire materials are faced with risks of reduction in electromigration (EM) lifetime. The EM lifetime reduction can often occur due to the so-called Kirkendall effect, which takes place upon usage in combination of certain materials with an increased difference in self-diffusion coefficient therebetween. The EM lifetime reduction is a serious bar to achieve higher reliability of wire material.
One typical prior known approach to preventing excessive decrease in lead pattern width—i.e. pattern thinning—otherwise occurring due to surface reflection of an Al alloy during fabrication of Al-alloy wiring leads by photolithographic patterning techniques is to employ a device structure with an antireflection film made of a lamination of titanium nitride (TiN) and titanium (Ti) disposed on a lead pattern surface. Unfortunately this approach suffers from a problem as to the EM lifetime reduction. This can be said because, as known among those skilled in the semiconductor art, a chemical reaction layer of Al and Ti (such as TiAl3 film or the like) could be formed on such lead pattern surface, which layer badly serves as a route or path that causes accelerated outdiffusion of copper (Cu) as has been doped into the Al-alloy layer. The creation of such Cu diffusion path undesirably hasten reduction in EM lifetime due to the Kirkendall effect. In order to lower the drift speed of Al used for the lead pattern, let the Al-based leads contain Cu inherently less in drift speed to thereby eliminate generation of voids due to Al diffusion. Here, Cu is outdiffused with the reaction layer (TiAl3 or else) being as its diffusion path, resulting in a decrease in Al-drift suppression effects. This Al-drift suppression in turn causes the EM lifetime reduction stated supra.
To improve the EM lifetime of on-chip interconnect leads, the following discussion was made.
It has been stated that formation of the reaction layer (TiAl3 or else) is considered to be formed mainly due to the presence and behavior of Ti in the antireflection film. In light of this, consideration was given to reducing the thickness of a Ti thin-film of the TiN/Ti antireflection film which is widely employable as the currently available antireflection film structure while subdividing the reaction layer serving as the Cu diffusion path into several spaced-apart portions or “segments.” However, this approach results in that any expected reaction layer segmentation effect does not come without accompanying a limit in Ti film thickness settings—that is, such segmentation is attainable only when letting the Ti film measure 5 nanometers (nm) or less. This undesirably requires the use of special thin-film fabrication apparatus or equipment with difficulties in achieving accurate film thickness control procedures.
Another method was also studied for excluding or “depleting” Ti of such antireflection film to provide a single-layered TiN layer structure. Unfortunately, this approach results in creation of a problem that the via-hole resistivity increases rather than decreases. Such via-hole resistance reduction is due to formation of an aluminum nitride (AlN) dielectric layer at the interface between TiN and Al films. More specifically this would take place due to occurrence of electrical interconnect defects between W and Al within via holes as resulted from AlN formation and/or via-hole fabrication failures occurring due to the fact that AlN acts as an etch stopper during fabrication of via holes. Although additional experimentation was conducted with respect to certain single-layered wiring leads employing similar structures, this also resulted in a significant decrease in EM lifetime.
To investigate the cause of such results, consideration was given to the process for fabrication of the TiN layer. See FIG. 16, which depicts one process step of forming such TiN film.
As shown in FIG. 16, the TiN film 50 is manufactured through sputtering using a Ti target 51 in the atmosphere of a mixture of nitrogen (N2) and argon (Ar) gases. At this time, inclusion of N2 in the sputtering atmosphere would result in production of nitrogen radicals in a reactive sputtering plasma. These nitrogen radicals behave to nitride the surface of an Al pattern 52, which leads to formation of a dielectric layer of AlN. This suggests that avoiding formation of such dielectric AlN layer may lead in principle to improvement in EM lifetime.
Additionally, one prior known technique for suppressing such AlN formation is disclosed, for example, in Japanese Patent Laid-Open No. Hei. 7-99193. The technique as taught by this Japanese document is such that a TiN film is formed on the surface of an Al lead pattern at low temperatures of 150° C. or less to thereby decrease the chemical reactivity of residual nitrogen radicals created in a plasma with respect to Al, which in turn suppresses fabrication of an AlN layer. Regrettably, this technique remains deficient in AlN formation suppressibility. Another problem faced with the technique is that Ti becomes harder in diffusion into Al material. This can be said because the TiN film being formed on the Al pattern surface is typically made of a chosen material that is high in diffusion block or “barrier” performance. This makes it impossible or at least greatly difficult to obtain the intended effect of lowering an interface energy between TiN and Al due to Ti diffusion—this is inherently expected owing to insertion of the Ti film between Al and TiN films—and the effect of enabling successful fulfillment of voids or holes within Al materials by means of Ti diffusion.